

puts "Start to source [info script]"

global SLR1_DPU_V3_TOP


# set_property LOC  RAMB36_X3Y73 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_l/gen_brams[0].gen_brams_first.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y74 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_l/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y75 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_l/gen_brams[2].gen_brams_last.RAMB36E2_ins]
# set_property LOC  RAMB36_X7Y77 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_r/gen_brams[0].gen_brams_first.RAMB36E2_ins]
# set_property LOC  RAMB36_X7Y78 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_r/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X7Y79 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_216bx36bx1k_1r1w1c_hi_r/gen_brams[2].gen_brams_last.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y69 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_l/gen_brams[0].gen_brams_first.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y70 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_l/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y71 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_l/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X3Y72 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_l/gen_brams[3].gen_brams_last.RAMB36E2_ins]
# set_property LOC  RAMB36_X1Y68 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_r/gen_brams[0].gen_brams_first.RAMB36E2_ins]
# set_property LOC  RAMB36_X1Y69 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_r/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X1Y70 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_r/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
# set_property LOC  RAMB36_X1Y71 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_288bx36bx1k_1r1w1c_lo_r/gen_brams[3].gen_brams_last.RAMB36E2_ins]
# set_property LOC  RAMB18_X4Y162 [get_cells $SLR1_DPU_V3_TOP/u_org_dma_top/u_org_dma/u_buf_reorg_ram/u_buf_ram_9bx2k_1r1w1c_top/RAMB18E2_inst]


set_property LOC RAMB36_X7Y76 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[0].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC RAMB36_X7Y77 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[0].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC RAMB36_X7Y78 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[0].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC RAMB36_X7Y79 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[0].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC RAMB36_X3Y71 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[1].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC RAMB36_X3Y72 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[1].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC RAMB36_X3Y73 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[1].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC RAMB36_X3Y74 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[1].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC RAMB36_X1Y68 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[2].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC RAMB36_X1Y69 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[2].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC RAMB36_X1Y70 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[2].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC RAMB36_X1Y71 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[2].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC RAMB36_X8Y77 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[3].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC RAMB36_X8Y78 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[3].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC RAMB36_X8Y79 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[3].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC RAMB36_X8Y80 [get_cells $SLR1_DPU_V3_TOP/u_fu_x_top/u_fu_x_rd_buf/u_fu_x_reorg_ram/gen_ram_bk[3].u_fu_x_ram_128bx8bx1k_1r1w1c/gen_brams[3].gen_brams_last.RAMB36E2_ins]


set_property LOC  RAMB36_X5Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[0].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[0].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[0].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[0].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y76 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[100].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y77 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[100].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y78 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[100].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y79 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[100].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y76 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[101].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y77 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[101].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y78 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[101].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y79 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[101].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y89 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[102].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y90 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[102].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[102].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y92 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[102].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[103].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y81 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[103].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[103].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[103].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[104].ram_18_104_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y92 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[104].ram_18_104_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y93 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[104].ram_18_104_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y94 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[104].ram_18_104_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[105].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y89 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[105].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y90 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[105].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[105].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[106].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y92 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[106].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y93 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[106].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y94 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[106].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[107].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[107].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y86 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[107].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[107].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[108].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y92 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[108].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y93 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[108].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y94 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[108].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[109].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[109].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[109].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[109].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[10].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[10].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y86 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[10].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[10].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y92 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[110].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y93 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[110].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y94 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[110].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y95 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[110].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y68 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[111].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y69 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[111].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y70 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[111].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y71 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[111].ram_18_105_111_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y79 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[112].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[112].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y81 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[112].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[112].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[113].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[113].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[113].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[113].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y68 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[114].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y69 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[114].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y70 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[114].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y71 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[114].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y66 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[115].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y67 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[115].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y68 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[115].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y69 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[115].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[116].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[116].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[116].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[116].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y72 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[117].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y73 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[117].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y74 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[117].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y75 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[117].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y76 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[118].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y77 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[118].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y78 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[118].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y79 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[118].ram_18_112_118_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y72 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[119].ram_18_119_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y73 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[119].ram_18_119_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y74 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[119].ram_18_119_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y75 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[119].ram_18_119_b7.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y92 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[11].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y93 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[11].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y94 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[11].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y95 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[11].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y65 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[12].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y66 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[12].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y67 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[12].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y68 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[12].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[13].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y89 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[13].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y90 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[13].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[13].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[14].ram_18_14_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[14].ram_18_14_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[14].ram_18_14_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[14].ram_18_14_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[15].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y89 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[15].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y90 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[15].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[15].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[16].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y89 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[16].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y90 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[16].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[16].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[17].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[17].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y86 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[17].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[17].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y92 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[18].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y93 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[18].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y94 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[18].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y95 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[18].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y77 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[19].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y78 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[19].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y79 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[19].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[19].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[1].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[1].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[1].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[1].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y76 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[20].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y77 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[20].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y78 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[20].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y79 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[20].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[21].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y81 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[21].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[21].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[21].ram_18_15_21_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y64 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[22].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y65 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[22].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y66 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[22].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y67 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[22].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y69 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[23].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y70 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[23].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y71 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[23].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y72 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[23].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[24].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[24].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[24].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[24].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y73 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[25].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y74 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[25].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y75 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[25].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y76 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[25].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[26].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[26].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[26].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[26].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[27].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[27].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[27].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[27].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[28].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[28].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[28].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[28].ram_18_22_28_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[29].ram_18_29_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[29].ram_18_29_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[29].ram_18_29_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[29].ram_18_29_b1.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[2].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[2].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[2].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[2].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[30].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[30].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[30].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[30].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[31].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[31].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[31].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[31].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[32].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[32].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[32].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[32].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[33].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[33].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[33].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[33].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[34].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[34].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[34].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[34].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[35].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[35].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[35].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[35].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[36].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[36].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[36].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[36].ram_18_30_36_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y73 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[37].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y74 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[37].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y75 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[37].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y76 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[37].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[38].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y89 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[38].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y90 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[38].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[38].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y76 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[39].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y77 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[39].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y78 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[39].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y79 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[39].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y64 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[3].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y65 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[3].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y66 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[3].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y67 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[3].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[40].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[40].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y86 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[40].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[40].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[41].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y89 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[41].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y90 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[41].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[41].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[42].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y81 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[42].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[42].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[42].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y92 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[43].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y93 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[43].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y94 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[43].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y95 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[43].ram_18_37_43_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y66 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[44].ram_18_44_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y67 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[44].ram_18_44_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y68 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[44].ram_18_44_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y69 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[44].ram_18_44_b2.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[45].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[45].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y89 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[45].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y90 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[45].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[46].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[46].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y89 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[46].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y90 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[46].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y77 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[47].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y78 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[47].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y79 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[47].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[47].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[48].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y81 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[48].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[48].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[48].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[49].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y81 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[49].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[49].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[49].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[4].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[4].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[4].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[4].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y81 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[50].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[50].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[50].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[50].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y75 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[51].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y76 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[51].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y77 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[51].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y78 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[51].ram_18_45_51_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y77 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[52].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y78 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[52].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y79 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[52].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[52].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[53].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[53].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[53].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[53].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[54].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[54].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[54].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[54].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[55].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[55].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[55].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[55].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[56].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[56].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[56].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[56].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[57].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[57].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[57].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[57].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[58].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[58].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[58].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[58].ram_18_52_58_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[59].ram_18_59_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[59].ram_18_59_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[59].ram_18_59_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[59].ram_18_59_b3.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[5].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[5].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[5].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[5].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[60].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[60].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[60].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[60].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[61].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[61].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[61].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[61].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[62].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[62].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[62].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[62].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[63].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[63].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[63].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[63].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y64 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[64].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y65 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[64].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y66 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[64].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y67 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[64].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[65].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[65].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[65].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[65].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[66].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[66].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[66].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[66].ram_18_60_66_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y68 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[67].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y69 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[67].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y70 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[67].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y71 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[67].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[68].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[68].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[68].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[68].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y64 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[69].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y65 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[69].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y66 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[69].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y67 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[69].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[6].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[6].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[6].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[6].ram_18_0_6_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[70].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[70].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[70].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[70].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[71].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[71].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[71].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[71].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[72].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y86 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[72].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[72].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[72].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y48 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[73].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[73].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[73].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[73].ram_18_67_73_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[74].ram_18_74_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[74].ram_18_74_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y86 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[74].ram_18_74_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X3Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[74].ram_18_74_b4.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[75].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y89 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[75].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y90 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[75].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y91 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[75].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y92 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[76].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y93 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[76].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y94 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[76].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y95 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[76].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[77].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[77].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[77].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[77].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y76 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[78].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y77 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[78].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y78 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[78].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y79 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[78].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y64 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[79].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y65 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[79].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y66 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[79].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y67 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[79].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[7].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[7].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[7].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[7].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[80].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[80].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y86 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[80].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X10Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[80].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[81].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[81].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[81].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y86 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[81].ram_18_75_81_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[82].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y86 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[82].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[82].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y88 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[82].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[83].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y64 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[83].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y65 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[83].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y66 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[83].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[84].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y81 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[84].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[84].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[84].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y72 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[85].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y73 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[85].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y74 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[85].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X8Y75 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[85].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y81 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[86].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[86].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[86].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[86].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y68 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[87].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y69 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[87].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y70 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[87].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y71 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[87].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y49 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[88].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y50 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[88].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y51 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[88].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X11Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[88].ram_18_82_88_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y52 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[89].ram_18_89_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y53 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[89].ram_18_89_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y54 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[89].ram_18_89_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X7Y55 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[89].ram_18_89_b5.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y80 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[8].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y81 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[8].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[8].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[8].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[90].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[90].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[90].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[90].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y56 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[91].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y57 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[91].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y58 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[91].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y59 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[91].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y69 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[92].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y70 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[92].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y71 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[92].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X9Y72 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[92].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y60 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[93].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y61 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[93].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y62 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[93].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X6Y63 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[93].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y72 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[94].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y73 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[94].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y74 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[94].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X0Y75 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[94].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y64 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[95].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y65 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[95].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y66 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[95].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y67 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[95].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y72 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[96].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y73 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[96].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y74 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[96].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X1Y75 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[96].ram_18_90_96_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y73 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[97].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y74 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[97].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y75 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[97].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y76 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[97].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y68 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[98].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y69 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[98].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y70 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[98].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X2Y71 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[98].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y82 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[99].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y83 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[99].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[99].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X4Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[99].ram_18_97_103_b6.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y84 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[9].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[0].gen_brams_first.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y85 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[9].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[1].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y86 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[9].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[2].gen_brams_mid.RAMB36E2_ins]
set_property LOC  RAMB36_X5Y87 [get_cells $SLR1_DPU_V3_TOP/u_wbuf/bram_sdp_2048b_8k/gen_rams[9].ram_18_7_13_b0.u_buf_ram_18bx8k_1r1w1c_w_i/gen_brams[3].gen_brams_last.RAMB36E2_ins]
